DREX (Plus) High-Performance Digital Receiver/Exciter Plus = Significant DSP Processing
CAES APD’s Digital Receiver/Exciter Plus (DREX+) meets the demands of next generation Department of Defense (DoD) radar, Electronic Warfare (EW), Signal Intelligence (SIGINT) and communication systems with strict Cost, Size, Weight and Performance (CSWaP) requirements.
The DREX+ provides eight receive channels with direct digital RF conversion/sampling capability up to 5 GHz in the first Nyquist zone and low 9 GHz at higher Nyquist zones. A selectable superheterodyne circuit on the RF front end module allows applications through 14 GHz band in the first Nyquist Zone; this also allows for lower sampling ADCs and higher dynamic range. CAES APD has .25, 3 and 10 GSPS ADC modules. The eight channel exciter can generate direct RF through 6 GHz and with the selectable super-heterodyne up conversion can generate waveforms up to 14 GHz band. This leverages a 12.6 GHz DAC module. The RF DAC channels feed the ADC inputs for testing, test targets, calibration, dithering, etc. The “+” indicates that the DREX has capabilities beyond the receiver and exciter: three bleeding edge Field Programmable Gate Arrays (FPGAs) and an advanced, 24 core General Purpose Processor (GPP) with math acceleration provide unprecedented compute capability, including Digital Signal Processing (DSP) and display system capability.
RF Tx/Rx Signal Conditioning Module
- Input Frequencies from DC to 14 GHz
- Direct RF, Nyquist Zone 1, from DC to 6 GHz
- Direct RF, Under Sampling, from 1.5 GHz to 9 GHz
- Super-heterodyne Down Conversion from DC to 14 GHz
Analog-to-Digital (ADC) Module
- 8-Channel Input
- Intel (Altera) Arria 10 FPGA with OpenCL BSP
- Multiple ADC options available, including: 250 MSPS, 3 GSPS and 10 GSPS
Digital-to-Analog (DAC) Module
- 8-Channel, 16-bit
- Intel Arria 10 FPGA
- CAES APD’s 3DR, Modular, High Performance Crestone Processor Module
- NXP (Freescale) T4240 PowerPC (PPC) with 24 Virtual High Performance Cores, Scaling to 1.8 GHz and AltiVec Floating Point Vector Math Accelerators
- Intel (Altera) Stratix V FPGA, Optimized for Variable-precision Digital Signal Processing (DSP) and Dynamically Reconfigurable Transceivers
- PCIe Gen 3, LVDS, SerDes and 4X 10 GbE Interfaces
- NXP K61 Microcontroller Provides Total System Health Monitoring and Protection
- 3-6U 19” Rack Mountable Server or similar
- MIL-STD Ruggedization
- Approximately 30 lbs.
- Front Panel LED T.V. Screen for Status Control