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3DR Thunder II - 8-channel, 16-bit, 11.5 GSPS Digital-to-Analog Converter

Features

FPGA
  • Intel Arria 10
  • 10AX115U2F45I2SG
  • JTAG programmable

I/O Support Available Via
  • Y-connector (2x)
  • Z-connector (1x)
  • JTAG
  • UART
  • RGMII (RJ45)

Tailored Clocking and Control Signal Flexibility
  • Clock input (SMA)
  • SPI Programmable HMC7044 to generate high fidelity JESD204B clock network

Digital-to-Analog Conversion
  • AD9172
  • 8-channel
  • 16-bit

Standard 3D Computing Microcontroller Interface
  • K61 μ controller
  • Controls power-on and power-down sequencing
  • Monitors voltages and reports faults
  • Monitors current, e-fuse shut-down
  • Monitors board temperature
  • On board EEPROM for data storage and logging (write protect available)
  • Internal FRAM Memory

CPLD
MaxV Reset CPLD
  • Reset control/interrupt monitoring
  • 1.8/3.3 V standard I/O
  • MCU SPI fanout
  • JTAG programmable
  • Internal NOR flash memory

MaxV JTAG CPLD
  • JTAG chain establishment and control
  • FPGA reset CPLD programming via JTAG
  • General purpose/Digital Signal Processing (DSP)
  • Radar exciters and Digital Waveform Generation (DWG)
  • Electronic warfare/attack systems
  • SIGINT (ELINT, COMINT, etc.) systems

Images

Block Diagram