3DR Lightning II – 8-channel, 14-bit, 3 GSPS Analog-to-Digital Converter

Processing

• Altera Arria 10 FPGA
  10AX115U2F45I2SG
• 4 GB DDR3
• Variable ENOB: 8.8 – 9.2

Analog-to-Digital Conversion (ADC)

• AD9208
• Configurable sample rate up to 3 GSPS
• Resolution: up to 14-bits

External I/O Support Available Via

• Y-Connector (2x)
• Z-Connector (1x)
• UART

Tailored Clocking and Triggering Flexibility

• 100 MHz external input clock
• 2x SMA input for use as trigger/gate
• Clock inputs (SMA)

Physical

• Dimensions: 6.25” L x 6.25” W
• Distance between board: 1.1” (stacked, board–to-board)

Addl Functionality

• Microcontroller interface via K61 μ controller
• Controls power–on and power–down sequencing
• Monitors voltages and reports faults over I2C bus
• Monitors current, e–fuse shut–down, and reports over I2C bus
• Monitors board temperature over I2C
  bus (external sensor available)
• On board EEPROM for data storage and logging (write protect available)
• FPGAs and CPLDs programmable over JTAG Bus (for applicable
  modules with FPGAs and CPLDs), or via connectors from other 3DR computing boards (firmware required)