Lightning II – 3DR-A10-ADC-3GSPS

Lightning LogoThe 3DR-A10-ADC-3GSPS is an 8 channel, 14 bit, 3 GSPS analog-to-digital converter board for digitizing and processing analog inputs. High performance, low latency processing can be implemented via the on-board Altera Arria 10 FPGA (10AX115U2F45I2SG). As with all 3DR computing modules, the 3DR-A10-ADC-3GSPS supports three-dimensional connectivity, allowing the user to stack and/or tile modules to address a wide variety of processing, I/O, size, weight, and power requirements.

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SKU: LightningII Categories: , ,

Description

The 3DR-A10-ADC-3GSPS is an 8 channel, 14 bit, 3 GSPS analog-to-digital converter board for digitizing and processing analog inputs. High performance, low latency processing can be implemented via the on-board Altera Arria 10 FPGA (10AX115U2F45I2SG). As with all 3DR computing modules, the 3DR-A10-ADC-3GSPS supports three-dimensional connectivity, allowing the user to stack and/or tile modules to address a wide variety of processing, I/O, size, weight, and power requirements. The 3DR-A10-ADC-3GSPS provides PCIe and LVDS interfaces via the Y and Z connectors to other modules in the 3DR computing family. It also offers additional external interfaces, including SMA connections for clocking and triggering flexibility along with time of day (ToD).

3DR computing technology brings together high performance computing, ease of programmability, low-cost, and commercial I/O flexibility in a modular, open systems and standards architecture to realize uniquely scalable and widely configurable, high speed, embedded processing solutions for the development of radar, electronic warfare (EW), signal intelligence (SIGINT), and communication systems. 3DR computing possesses the unique ability to morph in size, shape, and processing capacity. This flexibility provides a low cost, standard solution capable of rapidly conforming to the vastly different power, space, and environmental requirements found aboard any surface, sub-surface, or airborne system or platform.

Applications

  • Digital signal processing/data acquisition
  • Radar receiver (digital receiver)
  • Digital array processing and beamforming
  • Electronic warfare/attack systems

Features

FPGA

  • Altera Arria 10
  • 10AX115U2F45I2SG
  • 4GB DDR
  • ENOB AD 9208

Analog-to-Digital Conversion

  • 3 GSPS
  • 14-bit
  • Approximately 10
  • >75 GHz instantaneous bandwidth

Tailored Clocking and Triggering Flexibility

  • Sample gates (SMA) in/out
  • Trigger (SMA) in/out
  • Clock inputs (SMA)

External I/O Support Available Via

  • Y-connector (2x)
  • Z-connector (1x)
  • JTAG
  • 4x—40 GbE daughter card
  • SMA
  • UART
  • 100 MHz external input clock

Benefits

  • Enough FPGA Flash memory to hold two FPGA configurations
  • On board current limiting circuitry fuse and temperature monitoring for board protection
  • Standard 4-pin power

Specifications

ADC

  • 3 GSPS
  • 14-bit
  • Approximately 10
  • >75 GHz Instantaneous bandwidth

Environmental

  • Operating temperature : 0° to 50°C (commercial configuration)
  • Storage temperature : (est) -55°C to 100°C, cooling airflow recommended, FPGA application dependent (heat sink mounts available)

Health Monitoring

  • Board Voltages
  • PCIe switch, FPGA
  • Two external temperature sensors
  • I2C a
  • Smoke detection
  • Impact detection

Clocking Options

  • On board oscillator
  • Off board SMA

Memory-DDR

  • 4 GB unbuffered

External Interfaces*

  • Y1, Connectors : PCIe & LVDS (FPGA)
  • Y2, Z2 Connectors: LVDS (FPGA)

*Connectors Y1, Y2, Z2 have PCIe, SerDes, and LVDS

Physical

  • Dimensions: 6.25”L x 6.25”W
  • Distance between boards (stacked, board-to-board): 1.1”

Power

  • Power consumption: 12V @ 15.5 amps (subject to FPGA loading)
  • Supply options: 12V power cable
  • Additional power features: e-fuse/continuous power monitoring